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1CY 7C28 7
CY7C287
64K x 8 Reprogrammable Registered PROM
Features
* CMOS for optimum speed/power * Windowed for reprogrammability * High speed -- tSA = 45 ns -- tCO = 15 ns * Low power -- 120 mA * On-chip, edge-triggered output registers * Programmable synchronous or asynchronous output enable * EPROM technology, 100% programmable * 5V 10% VCC, commercial and military * TTL-compatible I/O * Slim 300-mil package * Capable of withstanding >2001V static discharge put enable that can be programmed to be synchronous (ES) or asynchronous (E). It is available in a 28-pin, 300-mil package. The address set-up time is 45 ns and the time from clock HIGH to output valid is 15 ns. The CY7C287 is available in a cerDIP package equipped with an erasure window to provide reprogrammability. When exposed to UV light, the PROM is erased and can be reprogrammed. The memory cells utilize proven EPROM floating-gate technology and byte-wide intelligent programming algorithms. The CY7C287 offers the advantage of low power, superior performance, and programming yield. The EPROM cell requires only 12.5V for the supervoltage and low current requirements allow for gang programming. The EPROM cells allow for each memory location to be 100% tested with each cell being programmed, erased, and repeatedly exercised prior to encapsulation. Each PROM is also tested for AC performance to guarantee that the product will meet DC and AC specification limits after customer programming. Reading the CY7C287 is accomplished by placing an active LOW signal on E/E S. The contents of the memory location addressed by the address lines (A0 - A 15) will become available on the output lines (O0 - O 7) on the next rising of CP.
Functional Description
The CY7C287 is a high-performance 64K x 8 CMOS PROM. The CY7C287 is equipped with an output register and an out-
Logic Block Diagram
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 E/ES CP OE REGISTER PROGRAMMABLE MULTIPLEXER C287-1 O0 COLUMN ADDRESS Y X ROW ADDRESS 512x 1024 PROGRAMMABLE ARRAY 8 x 1 of 128 MULTIPLEXER 8 SENSE AMPS 8-BIT EDGETRIGGERED REGISTER O7 O6 O5 O4 O3 O2 O1
Pin Configurations
CerDIP Top View
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND 1 28 2 27 3 26 4 25 5 24 6 7C287 23 22 7 21 8 9 20 10 19 11 18 12 17 13 16 14 15 VCC A10 A11 A12 A13 A14 A15 CP E/ES O7 O6 O5 O4 O3 C287-3
ADDRESS DECODER
LCC/PLCC Top View
4 3 2 1 32 31 30 29 5 28 6 7C287 27 7 26 8 25 9 24 10 23 11 22 12 21 13 14151617 181920
A5 A4 A3 NC A2 A1 A0 GND O0
A12 A13 A14 A15 NC CP E/ES O7 GND
C287-2
Cypress Semiconductor Corporation
*
3901 North First Street
*
San Jose * CA 95134 * 408-943-2600 September 1994 - Revised December 1994
CY7C287
Selection Guide
7C287-45 Maximum Set-Up Time (ns) Maximum Clock to Output (ns) Maximum Operating Current (mA) Com'l Mil 45 15 120 7C287-55 55 20 120 150 7C287-65 65 25 120 150
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .....................................-65C to +150C Ambient Temperature with Power Applied..................................................-55C to +125C Supply Voltage to Ground Potential .................-0.5V to +7.0V DC Voltage Applied to Outputs in High Z State .....................................................-0.5V to +7.0V DC Input Voltage .................................................-3.0V to +7.0V DC Program Voltage .....................................................13.0V
UV Exposure ................................................ 7258 Wsec/cm 2 Static Discharge Voltage ........................................... >2001V (per MIL-STD-883, Method 3015.2) Latch-Up Current ..................................................... >200 mA
Operating Range
Range Commercial Industrial[1] Military[2] Ambient Temperature 0C to +70C -40C to +85C -55C to +125C VCC 5V 10% 5V 10% 5V 10%
Electrical Characteristics Over the Operating Range[3]
7C287-45 Parameter VOH VOL VIH VIL IIX VCD IOZ IOS ICC VPP IPP VIHP VILP Description Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input Load Current Input Diode Clamp Voltage Output Leakage Current Output Short Circuit Current VCC Operating Supply Current Programming Supply Voltage Programming Supply Current Input HIGH Programming Voltage Input LOW Programming Voltage 3.0 0.4 GND < VOUT < VCC, Output Disabled VCC = Max., VOUT = GND[5] VCC = Max., IOUT = 0 mA Com'l Mil 12 13 50 3.0 0.4 12 -40 -20 +40 -90 120 Test Conditions VCC = Min., IOH = -2.0 mA VCC = Min., IOL = 8.0 mA Com'l Mil Guaranteed Input Logical HIGH Voltage for Inputs Guaranteed Input Logical LOW Voltage for Inputs GND < VIN < VCC -10 2.0 VCC 0.8 +10 -10 -40 -20 2.0 Min. 2.4 0.4 7C287-55 Max. 0.4 0.4 VCC 0.8 +10 +40 -90 120 150 13 50 3.0 0.4 12 -10 -40 -20 2.0 2.4 7C287-65 Min. 2.4 0.4 0.4 VCC 0.8 +10 +40 -90 120 150 13 50 V mA V V V V A A mA mA Max. Unit V V Max. Min.
Note 4
Notes: 1. Contact a Cypress representative for industrial temperature range specifications. 2. TA is the "instant on" case temperature. 3. See the last page of this specification for Group A subgroup testing information. 4. See Introduction to CMOS PROMs for general information on testing. 5. Short circuit test should not exceed 30 seconds.
2
CY7C287
Capacitance[4]
Parameter CIN COUT Description Input Capacitance Output Capacitance Test Conditions TA = 25C, f = 1 MHz, VCC = 5.0V Max. 10 10 Unit pF pF
AC Test Loads and Waveform[4]
R1 500 (658 MIL) 5V OUTPUT 30 pF INCLUDING JIG AND SCOPE R2 333 (403 MIL) 5 pF R2 333 (403 MIL)
C287-6 C287-5
5V OUTPUT
R1 500 (658 MIL) ALL INPUT PULSES 3.0V GND 5 ns 90% 10% 90% 10% 5 ns
INCLUDING JIG AND C287-4 SCOPE
(a) Normal Load
Equivalent to: THEVENIN EQUIVALENT OUTPUT 200
(b) High Z Load
2.0V
OUTPUT
250 1.9V
Commercial
Military
C287-7
Switching Characteristics Over the Operating Range[3,4]
7C287-45 Parameter tSA tHA tCO tHZE tDOE tPWC tSEs[6] tHEs[6] tHZC[6] tCOs[6] Description Address Set-Up to Clock HIGH Address Hold from Clock HIGH Clock HIGH to Output Valid Output High Z from E Output Valid from E Clock Pulse Width ES Set-Up to Clock HIGH ES Hold from Clock HIGH Output High Z from CLK/ES Output Valid from CLK/ES 15 12 5 20 20 Min. 45 0 15 15 15 20 15 8 25 25 Max. 7C287-55 Min. 55 0 20 20 20 25 18 10 30 30 Max. 7C287-65 Min. 65 0 25 25 25 Max. Unit ns ns ns ns ns ns ns ns ns ns
Notes: 6. Parameters with synchronous ES option.
3
CY7C287
Switching Waveform
A0 - A15 tHA ES tSEs tPWC CP tPWC tCO O0 - O7 VALID HIGH Z tHZE E tDOE tHZC tCOs tHEs tSEs tSA tHA
Erasure Characteristics
Wavelengths of light less than 4000 Angstroms begin to erase the CY7C287 in the windowed package. For this reason, an opaque label should be placed over the window if the PROM is exposed to sunlight or fluorescent lighting for extended periods of time. The recommended dose of ultraviolet light for erasure is a wavelength of 2537 angstroms for a minimum dose (UV intensity multiplied by exposure time) of 25 Wsec/cm2. For an ultraviolet lamp with a 12 mW/cm2 power rating, the exposure time would be approximately 35 minutes. The CY7C287 needs to Table 1. CY7C287 Mode Selection
be within 1 inch of the lamp during erasure. Permanent damage may result if the PROM is exposed to high-intensity UV light for an extended period of time. 7258 Wsec/cm2 is the recommended maximum dosage.
Programming Modes
Programming support is available from Cypress as well as from a number of third-party software vendors. For detailed programming information, including a listing of software packages, please see the PROM Programming Information located at the end of this section. Programming algorithms can be obtained from any Cypress representative.
Pin Function[7] Mode: Read or Output Disable Synchronous Read Output Disable - Asynchronous Output Disable - Synchronous Mode: Other Program Program Verify Program Inhibit Blank Check
Notes: 7. X = "don't care" but not to exceed VCC 5%. X can be VIL ir VIH.
CP VIL/VIH X VIL/VIH PGM VILP VIHP VIHP VIHP
A14 A14 A14 A14 LATCH VILP VILP VILP VILP
E, ES VIL VIH VIH VFY VIHP VILP VIHP VILP
A15 A15 A15 A15 VPP VPP VPP VPP VPP
O 7 - O0 O7 - O0 High Z High Z D7 - D0 D7 - D0 O7 - O0 High Z Zeros
4
CY7C287
DIP LCC
A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 GND
1 2 3 4 5 6 7C287 7 8 9 10 11 12 13 14
28 27 26 25 24 23 22 21 20 19 18 17 16 15
VCC A10 A11 A12 /A14 A13 /A15 LATCH VPP PGM VFY D7 D6 D5 D4 D3 C287-9
A5 A4 A3 NC A2 A1 A0 GND D0
4 3 2 1 32 31 30 29 5 28 6 7C287 27 7 26 8 25 9 24 10 23 11 22 12 21 13 14 15 16 17 18 19 20
A12 /A14 A13 /A15 LATCH VPP NC PGM VFY D7 GND
C287-10
Figure 1. Programming Pinouts
Architecture Configuration Bits
Architecture Bit E/ES Device 7C287 D0 Architecture Verify D0 0 = Erased 1 = PGMED Function Asynchronous Output Enable (Pin 20 = E) Synchronous Output Enable (Pin 20 = ES)
Bit Map
Programmer Address (Hex.) 0000 . . FFFF 10000 Architecture Byte (10000H)
D7 D0 C7 C6 C5 C4 C3 C2 C1C0
RAM Data Data . . Data Control Byte
5
CY7C287
Ordering Information[8]
Speed (ns) 45 Ordering Code CY7C287-45JC CY7C287-45PC CY7C287-45WC 55 CY7C287-55JC CY7C287-55PC CY7C287-55WC CY7C287-55DMB CY7C287-55LMB CY7C287-55QMB CY7C287-55WMB 65 CY7C287-65JC CY7C287-65PC CY7C287-65WC CY7C287-65DMB CY7C287-65LMB CY7C287-65QMB CY7C287-65WMB Package Name J65 P21 W22 J65 P21 W22 D22 L55 Q55 W22 J65 P21 W22 D22 L55 Q55 W22 Package Type 32-Lead Plastic Leaded Chip Carrier 28-Lead (300-Mil) Molded DIP 28-Lead (300-Mil) Windowed CerDIP 32-Lead Plastic Leaded Chip Carrier 28-Lead (300-Mil) Molded DIP 28-Lead (300-Mil) Windowed CerDIP 28-Lead (300-Mil) CerDIP 32-Pin Rectangular Leadless Chip Carrier 32-Pin Windowed Rectangular Leadless Chip Carrier 28-Lead (300-Mil) Windowed CerDIP 32-Lead Plastic Leaded Chip Carrier 28-Lead (300-Mil) Molded DIP 28-Lead (300-Mil) Windowed CerDIP 28-Lead (300-Mil) CerDIP 32-Pin Rectangular Leadless Chip Carrier 32-Pin Windowed Rectangular Leadless Chip Carrier 28-Lead (300-Mil) Windowed CerDIP Military Commercial Military Commercial Operating Range Commercial
Notes: 8. Most of these products are available in industrial temperature range. Contact a Cypress representative for specifications and product availability.
MILITARY SPECIFICATIONS Group A Subgroup Testing DC Characteristics
Parameter VOH VOL VIH VIL IIX IOZ ICC Subgroups 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3 1, 2, 3
Switching Characteristics
Parameter tSA tHA tCO tDOE tPWC Document #: 38-00363 Subgroups 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11 7, 8, 9, 10, 11
6
CY7C287
Package Diagrams
28-Lead (300-Mil) CerDIP D22
MIL-STD-1835 D-15 Config.A
32-Lead Plastic Leaded Chip Carrier J65
32-Pin Rectangular Leadless Chip Carrier L55
MIL-STD-1835 C-12
32-Pin Windowed Rectangular Leadless Chip Carrier Q55
MIL-STD-1835 C-12
7
CY7C287
Package Diagrams
28-Lead (300-Mil) Molded DIP P21
28-Lead (300-Mil) Windowed CerDIP W22
MIL-STD-1835 D-15 Config.A
(c) Cypress Semiconductor Corporation, 1994. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges.

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